lxvp

Load VSX Vector Pair

lxvp XT, DQ(RA)

Loads a double quadword from memory into two VSX registers.

Details

Loads a 256-bit (32-byte) aligned vector pair from memory at the effective address (RA + DQ), storing the first 128 bits into XT and the second 128 bits into XT+1. DQ is a 4-bit field that specifies the offset in units of 16 bytes, requiring 16-byte alignment. Requires VSX support.

Pseudocode Operation

EA ← (RA) + (DQ << 4); XT ← [EA]; (XT+1) ← [EA+16]

Programming Note

For best performance, EA should be word-aligned.

Example

lxvp vs1, 0(r4)

Encoding

Binary Layout
6
0
Tp
1
TX
6
RA
10
DQ
11
0
16
 
Format DQ-form
Opcode 0x18000000
Extension VSX
Registers Altered MSR

Operands

  • XT
    Target Even VSR
  • DQ
    Offset
  • RA
    Base
  • XTp
    Target Vector-Specific Register
  • disp
    Displacement field
  • VRT
    Target Vector-Specific Register
  • EA
    Effective Address