xsdivdp
VSX Scalar Divide Double-Precision
Divides the double-precision floating-point value in VSR[XA] by the double-precision floating-point value in VSR[XB].
Details
The xsdivdp instruction divides the double-precision floating-point value in doubleword element 0 of VSR[XA] by the double-precision floating-point value in doubleword element 0 of VSR[XB]. It handles special cases such as NaNs, infinities, and zero values according to the rules specified in Table 7.13.
Pseudocode Operation
if MSR.VSX=0 then VSX_Unavailable()
reset_xflags()
src1 ← bfp_CONVERT_FROM_BFP64(VSR[32×AX+A].dword[0])
src2 ← bfp_CONVERT_FROM_BFP64(VSR[32×BX+B].dword[0])
v ← bfp_DIVIDE(src1, src2)
rnd ← bfp_ROUND_TO_BFP64(0b0, FPSCR.RN, v)
result ← bfp64_CONVERT_FROM_BFP(rnd)
if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
if vxidi_flag=1 then SetFX(FPSCR.VXIDI)
if vxzdz_flag=1 then SetFX(FPSCR.VXZDZ)
if ox_flag=1 then SetFX(FPSCR.OX)
if ux_flag=1 then SetFX(FPSCR.UX)
if xx_flag=1 then SetFX(FPSCR.XX)
if zx_flag=1 then SetFX(FPSCR.ZX)
vx_flag ← vxsnan_flag | vxidi_flag | vxzdz_flag
vex_flag ← FPSCR.VE & vx_flag
zex_flag ← FPSCR.ZE & zx_flag
if vex_flag=0 & zex_flag=0 then do
VSR[32×TX+T].dword[1] ← 0x0000_0000_0000_0000
FPSCR.FPRF ← fprf_CLASS_BFP64(result)
FPSCR.FR ← inc_flag
FPSCR.FI ← xx_flag
else do
FPSCR.FR ← 0b0
FPSCR.FI ← 0b0
endProgramming Note
The xsdivdp instruction is used for dividing double-precision floating-point numbers. Ensure that the VSX (Vector Scalar Extensions) are enabled in the MSR register to avoid exceptions. Handle special cases like NaNs and infinities by checking the FPSCR flags after execution. The result is rounded according to the rounding mode set in FPSCR.RN.
Example
Encoding
Operands
-
XT
Target Vector-Scalar Register -
XA
Source Vector-Scalar Register -
XB
Source Vector-Scalar Register