lxsd

Load VSX Scalar Doubleword

lxsd VRT,disp(RA)

Loads a doubleword from memory into a VSX scalar register.

Encoding

Binary Layout

0

0:5

VRT

6:10

RA

11:15

DS

16:28

16

29:30

2

31

 

Format DS-form

Opcode 0xE4000002

Extension VSX

Operands

• VRT
  Target VSX Scalar Register
• RA
  Base General Purpose Register
• disp
  Displacement

Example

lxsd v1, disp(RA)

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

When Big-Endian byte ordering is employed, the contents of the doubleword in storage at address EA are placed into load_data in such an order that; the contents of the byte in storage at address EA are placed into byte 0 of load_data, and so forth until the contents of the byte in storage at address EA+7 are placed into byte 7 of load_data. When Little-Endian byte ordering is employed, let load_data be the contents of the doubleword in storage at address EA such that; the contents of the byte in storage at address EA are placed into byte 7 of load_data, and so forth until the contents of the byte in storage at address EA+7 are placed into byte 0 of load_data.

Operation

if 'lxsd' then
    EA ← (RA|0) + EXTS64(DS||0b00)
    VSR[VRT+32].dword[0] ← MEM(EA,8)
    VSR[VRT+32].dword[1] ← 0x0000_0000_0000_0000

Programming Note

The lxsd instruction loads a doubleword from memory into the VSX register, handling both Big-Endian and Little-Endian byte orderings. Ensure that the address is properly aligned to avoid potential performance penalties or exceptions. This instruction operates at user privilege level.