lxvrwx

Load VSX Vector Rightmost Word Indexed X-form

lxvrwx XT,RA,RB

Loads a word from memory into the rightmost word of a VSX vector register.

Encoding

Binary Layout

0

0:5

T

6:10

RA

11:15

RB

16:20

77

21:25

TX

26:31

 

Format X-form

Opcode 0x7C00009A

Extension VSX

Operands

• XT
  Target VSX Vector Register
• RA
  Source General Purpose Register (Base Address)
• RB
  Source General Purpose Register (Offset)

Example

lxvrwx vs1, r4, r5

Registers Altered

MSR

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Loads a 32-bit word from memory and places it in the rightmost (least significant) word position of a VSX register, with all other bits set to 0. The effective address is computed as RA|0 + RB. No status fields are modified by this instruction.

Operation

EA ← (RA=0 ? 0 : GPR[RA]) + GPR[RB]
VSR[XT] ← (0x00000000000000000000000 || MEM(EA, 4))

Programming Note

The lxvrwx instruction is used to load a word from memory into the rightmost word of a VSX vector register. Ensure that the VSX facility is enabled in the MSR register; otherwise, an exception will be raised. The address calculation involves adding two general-purpose registers, RA and RB, with a special case where if RA is zero, the base address defaults to zero. This instruction zeroes out the first three words of the target vector register before placing the loaded word into the rightmost position.