stxvl

Store VSX Vector Length

stxvl XS, RA, RB

Stores a specified number of bytes from a VSX vector register to memory.

Details

Stores up to 16 bytes from a VSX register to memory, with the byte count specified by bits 0–4 of RB. Bytes are stored from XS starting at address RA|0 (or RA + RB if RA is non-zero). This is a VSX category instruction with no effect on condition registers.

Pseudocode Operation

N ← RB[0:4]
if N > 16 then N ← 16
addr ← RA + 0 (if RA != 0 else address from context)
for i ← 0 to N-1
  [addr + i] ← XS[8*i:8*i+7]

Programming Note

Storing N bytes of data from the source VSR using stxvl in BE mode, results in the leftmost N bytes in the source VSR being placed in storage, starting with the leftmost byte of the source VSR. Storing N bytes of data from the source VSR using stxvl in LE mode, results in the rightmost N bytes in the source VSR being placed in storage, starting with the rightmost byte of the source VSR.

Example

stxvl vs1, r4, r5

Encoding

Binary Layout
31
0
XS
1
RA
6
RB
11
397
16
 
Format XX1-form
Opcode 0x7C00031A
Extension VSX
Registers Altered MSR

Operands

  • XS
    Source
  • RA
    Base
  • RB
    Length Reg