dmulq

Decimal Multiply Quad-Precision

dmulq vD, vA, vB

Multiplies two 128-bit DFP numbers.

Details

The dmulq instruction multiplies two DFP operands in FRA[p] and FRB[p]. The result is rounded to the target-format precision under control of DRN (bits 29:31 of the FPSCR). An appropriate form of the rounded result is selected based on the ideal exponent, which is the smaller exponent of the two source operands, and is placed in FRT[p].

Pseudocode Operation

FRT[p] ← RoundToTargetPrecision(FRA[p] * FRB[p])
SelectFormBasedOnIdealExponent(FRT[p], min(Exponent(FRA[p]), Exponent(FRB[p])))

Programming Note

The dmulq instruction is used for multiplying two decimal floating-point numbers with quad-precision. Ensure that the operands are correctly aligned and formatted as DFP. The result's precision is controlled by the FPSCR register, specifically the DRN bits. Be aware of potential rounding errors based on the target format precision.

Example

dmulq vd, va, vb

Encoding

Binary Layout
63
0
vD
6
vA
11
vB
16
34
21
/
31
 
Format X-form
Opcode 0xFC000042
Extension Decimal Floating-Point
Registers Altered FPSCR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B