xvcvhpsp

VSX Vector Convert Half-Precision to Single

xvcvhpsp XT, XB

Converts half-precision floating-point values in a vector register to single-precision floating-point values.

Encoding

Binary Layout

0:5

6:10

11:15

16:20

409

21:31

Format XX2-form

Opcode 0xF018076C

Extension VSX

Operands

XT
Target
XB
Source

Example

xvcvhpsp vs1, vs3

Registers Altered

FPSCR (FX, VXSNAN)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For xvcvhpsp, each half-precision floating-point value in the rightmost halfword of word element i of VSR[XB] is converted to a single-precision floating-point value and placed into word element i of VSR[XT].

Operation

if MSR.VSX=0 then VSX_Unavailable()
reset_flags()
ex_flag ← 0
for i from 0 to 3 do
    src ← bfp_CONVERT_FROM_BFP16(VSR[BX×32+B].word[i].hword[1])
    if src.class.SNaN = 1 then
        vresult.word[i] ← bfp32_CONVERT_FROM_BFP(bfp_QUIET(src))
        vxsnan_flag ← src.class.SNaN
        if vxsnan_flag = 1 then SetFX(FPSCR.VXSNAN)
        ex_flag ← ex_flag | (FPSCR.VE & vxsnan_flag)
    else
        vresult.word[i] ← bfp32_CONVERT_FROM_BFP(src)
    end
end
if ex_flag = 0 then VSR[32×TX+T] ← vresult

Programming Note

This instruction is used to convert half-precision floating-point values to single-precision. Ensure that the VSX feature is enabled in the MSR register. Handle exceptions by checking the FPSCR for VXSNAN and VE flags. The conversion respects NaN handling, converting signaling NaNs to quiet NaNs.