xvcmpgtsp

VSX Vector Compare Greater Than Single-Precision

xvcmpgtsp XT,XA,XB
xvcmpgtsp. XT,XA,XB

Compares each single-precision floating-point element in two vector registers and sets the corresponding element in a target vector register to all 1s if the first element is greater than the second, otherwise all 0s.

Details

For xvcmpgtsp, each integer value i from 0 to 3, the single-precision floating-point operand in word element i of VSR[XA] is compared to the single-precision floating-point operand in word element i of VSR[XB]. The contents of word element i of VSR[XT] are set to all 1s if the first operand is greater than the second, and all 0s otherwise.

Pseudocode Operation

if MSR.VSX=0 then VSX_Unavailable()

ex_flag ←0b0
all_false ←0b1
all_true ←0b1
do i = 0 to 3
    reset_xflags()
    src1 ←bfp_CONVERT_FROM_BFP32(VSR[32×AX+A].word[i])
    src2 ←bfp_CONVERT_FROM_BFP32(VSR[32×BX+B].word[i])
    if IsSNaN(src1)=1 | IsSNaN(src2)=1 then do
        vxsnan_flag ←0b1
        if FPSCR.VE=0 then vxvc_flag ←0b1
    end
    else
        vxvc_flag ←src1.class.QNaN | src2.class.QNaN
    if src1 > src2 then do
        vresult.word[i] ←0xFFFF_FFFF
        all_false ←0b0
    end
    else
        vresult.word[i] ←0x0000_0000
        all_true ←0b0
    end
    if vxsnan_flag=1 then SetFX(FPSCR.VXSNAN)
    if vxvc_flag=1 then SetFX(FPSCR.VXVC)
    ex_flag ←ex_flag | (FPSCR.VE & vxsnan_flag) | (FPSCR.VE & vxvc_flag)
end
if ex_flag=0 then VSR[32×TX+T] ←vresult
if Rc=1 then do
    if vex_flag=0 then
        CR.field[6] ←all_true || 0b0 || all_false || 0b0
    else
        CR.field[6] ←0bUUUU
end

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.

Example

xvcmpgtsp vs1, vs2, vs3

Encoding

Binary Layout
T
6
A
11
B
16
Rc
21
AX
22
BX
29
TX
30
 
Format XX3-form
Opcode 0xF000004B
Extension VSX
Registers Altered CR6, FPSCR

Operands

  • XT
    Target
  • XA
    Src A
  • XB
    Src B