slw

Shift Left Word

slw RT,RA,RB
slw. RT,RA,RB

Shifts a 32-bit register left by the amount specified in RB.

Details

The contents of the low-order 32 bits of register RS are shifted left the number of bits specified by (RB)58:63. Bits shifted out of position 32 are lost. Zeros are supplied to the vacated positions on the right. The 32-bit result is placed into RA32:63. RA0:31 are set to zero. Shift amounts from 32 to 63 give a zero result.

Pseudocode Operation

n ← (RB)59:63
r ← ROTL32((RS)32:63, n)
if (RB)58 = 0 then
    m ← MASK(32, 63-n)
else
    m ← 640
RA ← r & m

Programming Note

When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.

Example

slw r3, r4, r5

// r3 = r4 << r5 (32-bit).

Encoding

Binary Layout
31
0
RS
6
RA
11
RB
16
24
21
Rc
 
Format X-form
Opcode 0x7C000030
Extension Base
Registers Altered CR0

Operands

  • RA
    Target Register
  • RS
    Source Register
  • RB
    Shift Amount Register
  • RT
    Target General Purpose Register