addic.

Add Immediate Carrying and Record

addic. RT, RA, SI

Adds an immediate, updates Carry, and updates Condition Register Field 0 (CR0).

Encoding

Binary Layout

13

0:5

RT

6:10

RA

11:15

SI

16:31

 

Format D-form

Opcode 0x34000000

Extension Base

Operands

• RT
  Target Register
• RA
  Source Register
• SI
  Signed 16-bit Immediate

Example

addic. r3, r4, -5

// r3 = r4 - 5 (Updates CA and CR0)

Registers Altered

CR0

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Adds the signed 16-bit immediate SI to register RA and stores the result in RT, updating the Carry bit in XER and CR0. The '.' suffix indicates that CR0 is updated based on the result (LT, GT, EQ, SO). The Carry flag reflects whether the addition produced a result greater than 2^64-1.

Operation

RT ← RA + sign_extend(SI)
if RT > 2^64-1 or RT < -2^64 then XER[CA] ← 1 else XER[CA] ← 0
CR0 ← (RT < 0) || (RT > 0) || (RT = 0) || XER[SO]

Programming Note

The addic instruction is useful for adding an immediate value to a register while also handling potential overflow by setting the carry flag. Be cautious of overflow conditions that may affect subsequent operations. The result and comparison are recorded in separate registers, so ensure proper register management to avoid unintended data loss.