addc

Add Carrying

addc RT,RA,RB
addc. RT,RA,RB
addco RT,RA,RB
addco. RT,RA,RB

Adds the contents of two registers and a carry bit, placing the result in a target register.

Details

The sum (RA) + (RB) is placed into register RT.

Pseudocode Operation

if 'addc' then
    RT <- (RA) + (RB)
else if 'addc.' then
    RT <- (RA) + (RB)
    if Rc=1 then update CR0
else if 'addco' then
    RT <- (RA) + (RB)
    if OE=1 then update XER[SO], XER[OV]
else if 'addco.' then
    RT <- (RA) + (RB)
    if Rc=1 then update CR0
    if OE=1 then update XER[SO], XER[OV]

Programming Note

When Rc=1 (dot form), CR0 is updated with the signed comparison of the result against zero (LT, GT, EQ) and the current SO bit from XER.

Example

addc r3, r4, r5

Encoding

Binary Layout
0
0
RT
6
RA
11
RB
16
OE
21
10
22
Rc
31
31
 
Format XO-form
Opcode 0x7C000014
Extension Base
Registers Altered CR0, XER

Operands

  • RT
    Target Register
  • RA
    Source Register 1
  • RB
    Source Register 2