lmw

Load Multiple Word

lmw RT, D(RA)

Loads words from memory into registers RT through R31 (Context Switch).

Details

The lmw instruction loads n consecutive words starting at the effective address (EA) into the low-order 32 bits of GPRs RT through 31. The high-order 32 bits of these GPRs are set to zero.

Pseudocode Operation

if RA = 0 then b ← 0
else           b ← (RA)
EA ← b + EXTS(D)
r ← RT
do while r ≤ 31
    GPR(r) ← 320 || MEM(EA, 4)
    r ← r + 1
    EA ← EA + 4

Programming Note

This instruction is not supported in Little-Endian mode. If it is executed in Little-Endian mode, the system alignment error handler is invoked.

Example

lmw r3, 0(r4)

Encoding

Binary Layout
46
0
RT
6
RA
11
D
16
 
Format D-form
Opcode 0xB8000000
Extension Base

Operands

  • RT
    Start Register
  • D
    Displacement
  • RA
    Base