vbpermd

Vector Bit Permute Doubleword

vbpermd VRT,VRA,VRB

Performs a bit permute operation on doublewords of two vector registers and stores the result in another vector register.

Details

The vbpermd instruction performs a bit permute operation on the doublewords of two source vector registers (VRA and VRB) and stores the result in the destination vector register (VRT). Each byte of VRB is used as an index to select bits from VRA. If the index is less than 64, the corresponding bit from VRA is placed into the result; otherwise, the bit is set to 0.

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 1
    do j = 0 to 7
        index ← VSR[VRB+32].dword[i].byte[j]
        if index < 64 then
            perm.bit[j] ← VSR[VRA+32].dword[i].bit[index]
        else
            perm.bit[j] ← 0
    end
    VSR[VRT+32].dword[i] ← EXTZ64(perm)
end

Programming Note

The vbpermd instruction is used to perform bit-level permutation on doublewords of two source vectors. Ensure that the Vector Facility (MSR.VEC) is enabled before using this instruction; otherwise, a Vector_Unavailable exception will be raised. Each byte in VRB acts as an index to select bits from VRA; if the index exceeds 63, the corresponding bit in the result is set to zero. This operation is useful for tasks requiring precise control over bit manipulation within vector registers.

Example

vbpermd v1, v2, v3

Encoding

Binary Layout
0
0
VRT
6
VRA
11
VRB
16
 
Format VX-form
Opcode 0x100005CC
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Index Source Vector Register