xststdcqp
VSX Scalar Test Data Class Quad-Precision
xststdcqp BF, vB, DCM
Tests the data class of a quad-precision floating-point value and sets condition register bits based on the result.
Encoding
Binary Layout
63
0:5
BF
6:8
/
9:10
DCM
11:15
vB
16:20
706
21:30
/
31
Operands
-
BF
CR Field -
vB
Source -
DCM
Mask -
VRB
Vector-Scalar Register B -
DCMX
Data Class Mask
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
Tests the data class of a quad-precision floating-point value in vB against a data class mask (DCM) and stores the result in condition register field BF. The result is 1 if the value belongs to any class selected by the mask, 0 otherwise. This instruction requires VSX support and updates the specified CR field without affecting other status registers.
Operation
if (vB matches data class selected by DCM) then
CR[BF] ← 0b100
else
CR[BF] ← 0b000
endif
Programming Note
The xststdcqp instruction is used to test the data class of a quad-precision floating-point value. Ensure that the VSX (Vector Scalar Extensions) are enabled in the MSR register, otherwise, an exception will be raised. The result is stored in the condition register CR and FPSCR.FPCC, which can be used for conditional branching based on the data class match.