plfd
Prefixed Load Floating-Point Double MLS:D-form
plfd RT,RA,RB
Loads a double-precision floating-point value from memory into a VSX register.
Encoding
Binary Layout
01
0:5
100
6:10
Rc
11
.//..
12
RT
13:17
RA
18:22
RB
23:31
Operands
-
RT
Target General Purpose Register -
RA
Source General Purpose Register -
RB
Source General Purpose Register -
VRT
Destination VSX Register -
B
Base General Purpose Register
Example
plfd r3, r4, r5
Related
More in Prefixed
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
A prefixed load instruction that loads a double-precision floating-point value from memory into a VSX register using a 34-bit immediate displacement. The effective address is formed using a prefix word and suffix word together, supporting a much larger displacement range than standard instructions.
Operation
EA ← (RA) + EXTS(D)
VRT ← [EA]Programming Note
The plfd instruction is used to load a double-precision floating-point value from memory into a VSX register. Ensure that the base and index registers point to a correctly aligned 8-byte boundary to avoid alignment faults. This instruction operates at user privilege level.