plha

Prefixed Load Halfword Algebraic

plha RT, D(RA), R

Loads 16-bit halfword (Sign Extended) using 34-bit offset.

Details

The plha instruction loads a halfword from memory into the upper half of a register and sets the lower half to zero. The effective address is calculated based on the base register, an index register, and possibly the current instruction address (CIA) depending on the prefix field R.

Pseudocode Operation

if RA = 0 then b ← 0
else b ← (RA)
EA ← b + (RB)
RT ← EXTS(MEM(EA, 2)) || 480

Programming Note

The plha instruction is commonly used for loading a halfword from memory into the upper half of a register while zeroing out the lower half. Ensure that the base and index registers are correctly set to avoid incorrect memory access. This instruction operates at user privilege level and may raise an exception if the effective address is invalid or if there's a protection fault.

Example

plha r3, 0(r4), 0

Encoding

Binary Layout
1
0
2
6
R
8
0
9
D0
14
42
32
RT
38
RA
43
D1
48
 
Format MLS:D-form
Opcode 0x06000000
Extension Prefixed

Operands

  • RT
    Target
  • D
    Offset
  • RA
    Base
  • R
    PC-Rel