vclzb

Vector Count Leading Zeros Byte

vclzb vD, vB

Counts the number of leading zero bits in each byte element of a vector register.

Encoding

Binary Layout

VRT

VRB

Format VX-form

Opcode 0x10000702

Extension VMX (AltiVec)

Operands

vD
Target
vB
Source
VRT
Target Vector Register
VRB
Source Vector Register

Example

vclzb vd, vb

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For vclzb, the number of consecutive zero bits starting at bit 0 of each byte element in VSR[VRB+32] is placed into the corresponding byte element in VSR[VRT+32]. The count ranges from 0 to 8, inclusive.

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 15
    n ←0
    do while n < 8
        if VSR[VRB+32].byte[i].bit[n] = 0b1 then
            leave
        n ←n + 1
    end
    VSR[VRT+32].byte[i] ←n
end

Programming Note

The vclzb instruction counts leading zeros in each byte of the input vector. Ensure that the Vector Facility is enabled by checking and setting the appropriate bit in the MSR register. This instruction operates on 16-byte vectors, processing each byte individually. Be cautious with alignment; while not strictly required, proper alignment can optimize performance. The result is a vector where each element contains the count of leading zeros from the corresponding input byte.