vclzd

Vector Count Leading Zeros Doubleword

vclzd vD, vB

Counts the number of leading zero bits in each doubleword element of a vector register.

Details

For vclzd, for each integer value i from 0 to 1, counts the number of consecutive zero bits starting at bit 0 of doubleword element i of VSR[VRB+32] and places this count into doubleword element i of VSR[VRT+32].

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 1
    n ←0
    do while (n<64) & (VSR[VRB+32].dword[i].bit[n]=0b0)
        n ←n + 1
    end
    VSR[VRT+32].dword[i] ←n
end

Programming Note

The vclzd instruction counts leading zeros in each doubleword of the input vector. Ensure that the Vector Facility is enabled by checking and setting the MSR.VEC bit. This instruction operates on 64-bit elements, so input vectors must be aligned accordingly. The result is stored in the destination vector register.

Example

vclzd vd, vb

Encoding

Binary Layout
4
0
vD
6
0
11
vB
31
1986
 
Format VX-form
Opcode 0x100007C2
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vB
    Source
  • VRT
    Target Vector Register
  • VRB
    Source Vector Register