andis.

AND Immediate Shifted

andis. RA, RS, UI

Performs a bitwise AND between a register and a 16-bit immediate shifted left by 16 bits. Always updates CR0.

Details

The AND Immediate Shifted instruction performs a bitwise AND operation between the contents of register RS and an immediate value formed by shifting UI left by 5 bits (equivalent to multiplying UI by 32). The result is then stored in register RA. This instruction also sets the first three bits of CR Field 0.

Pseudocode Operation

RA <- (RS) & (UI || 0x0000); CR0 <- Compare(RA, 0)

Programming Note

The andis. instruction is useful for masking or clearing specific bits in a register by shifting an immediate value left by 5 bits before performing the AND operation. Be cautious with alignment as it affects performance; ensure that the immediate value does not exceed 31 to avoid unexpected results. This instruction operates at user privilege level and can generate exceptions if RA is an invalid register. The result of the operation sets CR0, which can be used for conditional branching.

Example

andis. r3, r4, 0x1234

Encoding

Binary Layout
29
0
RS
6
RA
11
UI
16
 
Format D-form
Opcode 0x74000000
Extension Base
Registers Altered CR0

Operands

  • RA
    Target Register
  • RS
    Source Register
  • UI
    Unsigned 16-bit Immediate