xvcpsgndp
VSX Vector Copy Sign Double-Precision
xvcpsgndp XT,XA,XB
Copies the sign bit from one double-precision vector element to another.
Encoding
Binary Layout
T
0:10
A
11:15
B
16:20
AX
21:28
BX
29
TX
30:31
Operands
-
XT
Target Vector-Specific Register -
XA
Source Vector-Specific Register -
XB
Source Vector-Specific Register
Example
xvcpsgndp vs1, vs2, vs3
Related
More in VSX
Reference
View in PowerISA v3.1C Specification ↗
OPF Power ISA v3.1C
Description
For xvcpsgndp, the sign bit of each doubleword element in VSR[XB] is copied to the corresponding doubleword element in VSR[XT], while the magnitude bits remain unchanged.
Operation
if MSR.VSX=0 then VSX_Unavailable()
do i = 0 to 1
src1 ←VSR[32×AX+A].dword[i] & 0x8000_0000_0000_0000
src2 ←VSR[32×BX+B].dword[i] & 0x7FFF_FFFF_FFFF_FFFF
VSR[32×TX+T].dword[i] ←src1 | src2
end
Extended Mnemonics
| Extended Mnemonic | Equivalent Instruction |
|---|---|
| xvmovdp |
Programming Note
This instruction is useful for copying the sign of double-precision floating-point numbers while preserving their magnitude. Ensure that VSX (Vector Scalar Extensions) are enabled in the MSR register to avoid exceptions. The operation is performed on each doubleword element independently, so alignment requirements are per-element rather than per-vector.