xvcvdpsxws
Vector Convert Double-Precision to Signed Word format with round to zero
Converts double-precision floating-point values in a vector to signed 32-bit integers with rounding towards zero.
Details
Converts each double-precision floating-point element in XB to a signed 32-bit integer in XT, rounding towards zero (truncation). This is a VSX instruction that operates on vector elements independently. No condition registers or status fields are affected by this instruction.
Pseudocode Operation
for i in 0 to 1 do
XT[i*64:(i+1)*64-1] ← CVTDP_TO_SI_RZ(XB[i*64:(i+1)*64-1])
end for
Programming Note
xvcvdpsxws rounds using Round towards Zero rounding mode. Previous versions of the architecture allowed the contents of words 1 and 3 of the result register to be undefined. However, all processors that support this instruction write the result into words 0 and 1 and words 2 and 3 of the result register.
Example
Encoding
Operands
-
XT
Target Vector Register -
XB
Source Vector Register