vmrghb

Vector Merge High Byte

vmrghb vD, vA, vB

Interleaves high-order bytes from two vectors (Permutation).

Details

For vmrghb, the high byte elements of VSR[VRA+32] and VSR[VRB+32] are merged into VSR[VRT+32].

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 7
    VSR[VRT+32].hword[i].byte[0] ← VSR[VRA+32].byte[i]
    VSR[VRT+32].hword[i].byte[1] ← VSR[VRB+32].byte[i]

Programming Note

This instruction is used to merge the high byte elements from two vector registers into a third. Ensure that the Vector Facility (MSR.VEC) is enabled; otherwise, a Vector_Unavailable exception will be raised. The operation processes each of the 8 high bytes, placing them alternately into the destination register. This instruction operates at the user privilege level and does not generate exceptions beyond those related to facility availability or invalid operand access.

Example

vmrghb vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
12
 
Format VX-form
Opcode 0x1000000C
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register