rlwinm

Rotate Left Word Immediate Then AND with Mask

rlwinm RA,RS,SH,MB,ME
rlwinm. RA,RS,SH,MB,ME

Rotates the low-order 32 bits of a register left by a specified number of bit positions, generates a mask, and performs an AND operation.

Details

The contents of register RS are rotated32 left SH bits. A mask is generated having 1-bits from bit MB+32 through bit ME+32 and 0-bits elsewhere. The rotated data are ANDed with the generated mask and the result is placed into register RA.

Pseudocode Operation

if 'rlwinm' then
    n ← SH
    r ← ROTL32((RS)32:63, n)
    m ← MASK(MB+32, ME+32)
    RA ← r & m

Programming Note

Let RSL represent the low-order 32 bits of register RS, with the bits numbered from 0 through 31. rlwinm can be used to extract an n-bit field that starts at bit position b in RSL, right-justified into the low-order 32 bits of register RA (clearing the remaining 32-n bits of the low-order 32 bits of RA), by setting SH=b+n, MB=32-n, and ME=31. It can be used to extract an n-bit field that starts at bit position b in RSL, left-justified into the low-order 32 bits of register RA (clearing the remaining 32-n bits of the low-order 32 bits of RA), by setting SH=b, MB = 0, and ME=n-1. It can be used to rotate the contents of the low-order 32 bits of a register left (right) by n bits, by setting SH=n (32-n), MB=0, and ME=31. It can be used to shift the contents of the low-order 32 bits of a register right by n bits, by setting SH=32-n, MB=n, and ME=31. It can be used to clear the high-order b bits of the low-order 32 bits of the contents of a register and then shift the result left by n bits, by setting SH=n, MB=b-n, and ME=31-n. It can be used to clear the low-order n bits of the low-order 32 bits of a register, by setting SH=0, MB=0, and ME=31-n.

Extended Mnemonics

Extended Mnemonic Equivalent Instruction
extlwi
srwi
clrrwi

Example

rlwinm r4, r3, 3, 0, 31

Encoding

Binary Layout
21
6
RS
11
RA
16
SH
21
MB
26
ME
31
Rc
 
Format M-form
Opcode 0x54000000
Extension Base
Registers Altered CR0

Operands

  • RA
    Target
  • RS
    Source
  • SH
    Shift
  • MB
    Mask Begin
  • ME
    Mask End