vcmpequd

Vector Compare Equal Doubleword

vcmpequd VRT,VRA,VRB
vcmpequd. VRT,VRA,VRB

Compares two vector registers for equality on an unsigned doubleword basis and stores the result in a third vector register.

Details

The vcmpequd instruction compares each doubleword element of the source vectors VRA and VRB. If the elements are equal, it sets the corresponding element in the destination vector VRT to all 1s (0xFFFF_FFFF_FFFF_FFFF). Otherwise, it sets the element to all 0s (0x0000_0000_0000_0000). If Rc=1, it also updates CR field 6 to indicate whether all elements compared true and whether all elements compared false.

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()

all_true ←1
all_false ←1

do i = 0 to 1
   src1 ←VSR[VRA+32].dword[i]
   src2 ←VSR[VRB+32].dword[i]
   if src1 = src2 then do
      VSR[VRT+32].dword[i] ←0xFFFF_FFFF_FFFF_FFFF
      all_false ←0
   end
   else do
      VSR[VRT+32].dword[i] ←0x0000_0000_0000_0000
      all_true ←0
   end
end

if Rc=1 then
   CR.field[6] ←all_true || 0b0 || all_false || 0b0

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.

Example

vcmpequd v1, v2, v3

Encoding

Binary Layout
4
0
VRT
6
VRA
11
VRB
16
Rc
21
199
22
 
Format VC-form
Opcode 0x100000C7
Extension VMX (AltiVec)
Registers Altered CR6

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register