vmaxuh

Vector Maximum Unsigned Halfword

vmaxuh vD, vA, vB

Selects maximum value per halfword (unsigned).

Encoding

Binary Layout

0:5

6:10

11:15

16:20

21:31

Format VA-form

Opcode 0x10000042

Extension VMX (AltiVec)

Operands

vD
Target
vA
Src A
vB
Src B

Example

vmaxuh vd, va, vb

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Selects the maximum unsigned value for each corresponding halfword pair from vA and vB, storing the results in vD. This is a vector operation that performs 8 independent halfword-wise maximum comparisons in parallel. No condition flags or status fields are affected.

Operation

for i in 0 to 7 do
  vD[16*i:16*i+15] ← MAX_UNSIGNED(vA[16*i:16*i+15], vB[16*i:16*i+15])
end for

Programming Note

The vmaxuh instruction is used to perform element-wise comparisons of unsigned halfwords from two source vectors and store the maximum values in a destination vector. Ensure that the Vector Facility (MSR.VEC) is enabled before using this instruction; otherwise, it will raise an exception. This instruction operates on 16-bit unsigned integers, so ensure proper alignment and data type handling to avoid unexpected results.