vmrglw

Vector Merge Low Word

vmrglw vD, vA, vB

Interleaves low-order words.

Details

The Vector Merge Low Word instruction (vmrglw) merges the low words from two source vectors, VRA and VRB, into a destination vector VRT. Specifically, it takes the second word from each source vector and places them into the first and third positions of the destination vector, respectively.

Pseudocode Operation

if MSR.VEC=0 then Vector_Unavailable()
VSR[VRT+32].word[0] ← VSR[VRA+32].word[2]
VSR[VRT+32].word[1] ← VSR[VRB+32].word[2]
VSR[VRT+32].word[2] ← VSR[VRA+32].word[3]
VSR[VRT+32].word[3] ← VSR[VRB+32].word[3]

Programming Note

The vmrglw instruction is used to merge the low words from two source vectors into a destination vector. Ensure that the Vector Facility (VEC) bit in the Machine State Register (MSR) is set; otherwise, a Vector_Unavailable exception will be raised. This instruction operates on 128-bit vector registers and requires proper alignment of the input vectors to avoid unexpected results.

Example

vmrglw vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
396
21
 
Format VX-form
Opcode 0x1000018C
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B