mfspr

Move From Special Purpose Register

mfspr RT, SPR

Moves the contents of a special purpose register into a general-purpose register.

Details

Moves the contents of a special-purpose register into a general-purpose register. The SPR field is reordered from its 10-bit encoding. Privilege level and results depend on which SPR is read; some SPRs are supervisor-only or hypervisor-only. No condition register flags are modified.

Pseudocode Operation

SPR_index ← (SPR[5:0] || SPR[10:5])
RT ← SPR[SPR_index]

Programming Note

The SPR field denotes a Special Purpose Register, encoded as shown in the table below. If the SPR field contains a value from 808 through 811, the instruction specifies a reserved SPR, and is treated as a no-op; see Section 1.3.3, “Reserved Fields, Reserved Values, and Reserved SPRs”. Otherwise, the contents of the designated Special Purpose Register are placed into register RT. For Special Purpose Registers that are 32 bits long, the low-order 32 bits of RT receive the contents of the Special Purpose Register and the high-order 32 bits of RT are set to zero.

Extended Mnemonics

Extended Mnemonic Equivalent Instruction
mfxer
mflr
mfctr

Example

mfspr r3, 8

// Move Link Register (LR) to r3.

Encoding

Binary Layout
10
0
RT
6
SPR[5:0]
11
SPR[10:5]
16
 
Format XFX-form
Opcode 0x7C0002A6
Extension Base
Registers Altered SPR

Operands

  • RT
    Target Register
  • SPR
    Special Purpose Register ID