iccci

Instruction Cache Congruence Class Invalidate

iccci RA, RB

Invalidates a congruence class in the instruction cache (Embedded).

Encoding

Binary Layout

31

0:5

/

6:10

RA

11:15

RB

16:20

966

21:30

/

31

 

Format X-form

Opcode 0x7C00078E

Extension Embedded

Operands

• RA
  Base
• RB
  Index

Example

iccci r4, r5

Related

More in Embedded

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Invalidates a congruence class in the instruction cache at the address formed by RA + RB. This is an embedded cache-management instruction with no guaranteed semantics on all implementations; behavior is implementation-dependent and may require supervisor privilege. The instruction has no effect on instruction cache entries in higher-level caches or main memory.

Operation

addr ← (RA) + (RB)
Invalidate instruction cache congruence class at addr