maddhd

Multiply-Add High Doubleword

maddhd RT,RA,RB,RC

Multiplies two 64-bit operands and adds the result to a third 64-bit operand, placing the high-order 64 bits of the sum into a target register.

Encoding

Binary Layout

0

0:5

RT

6:10

RA

11:15

RB

16:20

RC

21:31

 

Format VA-form

Opcode 0x10000030

Extension Base

Operands

• RT
  Target General Purpose Register
• RA
  Source General Purpose Register
• RB
  Source General Purpose Register
• RC
  Source General Purpose Register

Example

maddhd r3, r4, r5, r6

Related

More in Base

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

The 64-bit operands (RA) and (RB) are multiplied to produce a 128-bit product. This product is then added to the 64-bit operand (RC). The high-order 64 bits of the resulting sum are placed into register RT.

Operation

prod0:127 ← (RA) × (RB)
sum0:127 ← prod + EXTS(RC)
RT ← sum0:63

Programming Note

The maddhd instruction is useful for performing high-precision arithmetic operations where the product of two 64-bit numbers needs to be added to another 64-bit number, and only the high-order bits of the result are required. Ensure that the operands are correctly aligned and consider the potential for overflow in the intermediate product before adding RC. This instruction operates at a privilege level that allows it to be used in both user and supervisor modes.