machhwu

Multiply Accumulate High Halfword Unsigned

machhwu RT, RA, RB

Unsigned Multiply Accumulate High Halfword.

Details

Multiplies the high halfword (bits 0–15) of RA by the high halfword of RB as unsigned integers, then adds the 32-bit product to RT and stores the result in RT. This is part of the Embedded (SPE) category and does not affect any condition or status registers.

Pseudocode Operation

product ← EXTZ(RA[0:15]) × EXTZ(RB[0:15])
RT ← RT + product

Example

machhwu r3, r4, r5

Encoding

Binary Layout
4
0
RT
6
RA
11
RB
16
12
21
0
31
 
Format XO-form
Opcode 0x10000018
Extension Embedded

Operands

  • RT
    Acc/Dest
  • RA
    Src A
  • RB
    Src B