vctzb

Vector Count Trailing Zeros Byte

vctzb vD, vB

Counts the number of trailing zero bits in each byte element of a vector register.

Encoding

Binary Layout

0:5

VRT

6:10

11:15

VRB

16:20

1538

21:31

Format VX-form

Opcode 0x101C0602

Extension VMX (AltiVec)

Operands

vD
Target
vB
Source
VRT
Target Vector Register
VRB
Source Vector Register

Example

vctzb vd, vb

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For vctzb, the number of consecutive zero bits starting at bit 7 of each byte element in VSR[VRB+32] is placed into the corresponding byte element in VSR[VRT+32]. The count ranges from 0 to 8, inclusive.

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 15
    n ←0
    do while n < 8
        if VSR[VRB+32].byte[i].bit[7-n] = 0b1 then
            leave
        n ←n + 1
    end
    VSR[VRT+32].byte[i] ←CHOP8(EXTZ(n))
end

Programming Note

The vctzb instruction counts the number of trailing zero bits in each byte of the source vector, storing the result in the destination vector. Ensure that the Vector Facility is enabled by checking and setting the VEC bit in the MSR register. This instruction operates on 16-byte vectors and processes each byte independently. Be cautious with alignment; while not strictly required, proper alignment can improve performance.