vmul10ecuq

Vector Multiply-by-10 Extended & write Carry-out Unsigned Quadword

vmul10ecuq VX,VA,VB

Multiplies the unsigned quadword integer in vector register VA by 10, adds the least-significant bit of VB as a carry-in digit, and writes the carry-out of the result to vector register VX.

Encoding

Binary Layout

000100

0:5

6:10

11:15

16:20

00001

21:25

000001

26:31

Format VX-form

Opcode 0x10000041

Extension VMX (AltiVec)

Operands

VX
Target Vector Register
VA
Source Vector Register
VB
Source Vector Register

Example

vmul10ecuq v1, v2, v2

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Multiplies the unsigned 128-bit quadword in vector register VA by 10, adds the least-significant bit of VB as a carry-in, and writes only the carry-out (overflow) of the result to vector register VX. The result discards the low 128 bits, retaining only the high carry. This instruction requires VMX/AltiVec support and no condition registers are modified.

Operation

product ← (VA) × 10 + ((VB)[127] as carry-in)
VX ← product[128:191]

Programming Note

This instruction is ideal for high-performance multi-precision decimal arithmetic, especially when performing chained multiply-by-10 operations. Ensure that the input values in VA and VB are correctly aligned as unsigned 128-bit integers to avoid unexpected results. The carry-out written to VX should be used as the extended carry-in for subsequent operations to maintain precision.