vmulosh

Vector Multiply Odd Signed Halfword

vmulosh vD, vA, vB

Multiplies odd signed halfwords to words.

Details

The Vector Multiply Odd Signed Halfword instruction multiplies each pair of odd-numbered signed halfwords from two source vectors and stores the results as words in a destination vector. The operation is performed for each integer value i from 0 to 3.

Pseudocode Operation

if MSR.VEC=0 then Vector_Unavailable()
do i = 0 to 3
   src1 ←EXTS(VSR[VRA+32].hword[2×i+1])
   src2 ←EXTS(VSR[VRB+32].hword[2×i+1])
   VSR[VRT+32].word[i] ←CHOP32(src1 × src2)
end

Programming Note

This instruction is useful for performing element-wise multiplication of odd-numbered signed halfwords from two vectors. Ensure that the Vector Facility (MSR.VEC) is enabled before using this instruction; otherwise, a Vector_Unavailable exception will be raised. The result is stored as 32-bit words in the destination vector, so ensure proper alignment and size of the vectors to avoid unexpected behavior.

Example

vmulosh vd, va, vb

Encoding

Binary Layout
4
0
vD
6
vA
11
vB
16
328
21
 
Format VX-form
Opcode 0x10000148
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B