drrndq

Decimal Reround Quad-Precision

drrndq vD, vA, vB

Rerounds a 128-bit DFP number to fewer digits.

Details

The drrndq instruction performs a decimal reround operation on quad-precision operands. It takes two source operands, FRA and FRB, and a rounding mode control (RMC). The result is placed in the destination register FRTp. The instruction handles various cases based on the values of the operands and the specified rounding mode.

Pseudocode Operation

f1 <- DFP_operation(f2, f3)

Programming Note

The drrndq instruction is used for precise decimal arithmetic operations, particularly useful in financial applications where exact decimal representation is crucial. Ensure that the source operands (FRA and FRB) are correctly aligned and formatted as quad-precision decimals to avoid precision loss. The rounding mode control (RMC) should be set according to the desired rounding behavior, such as round-to-nearest or truncate. This instruction operates at a privilege level that allows access to floating-point operations, and it may raise exceptions if operands are out of range or if there are invalid operations.

Example

drrndq vd, va, vb

Encoding

Binary Layout
63
0
vD
6
vA
11
vB
16
98
21
/
31
 
Format X-form
Opcode 0xFC0000C2
Extension Decimal Floating-Point
Registers Altered FPSCR

Operands

  • vD
    Target
  • vA
    Source
  • vB
    Control