vclrrb

Vector Clear Right Bytes

vclrrb vD, vA, RB

Clears the N rightmost bytes of a vector.

Encoding

Binary Layout

4

0:5

vD

6:10

vA

11:15

RB

16:20

461

21:31

 

Format VX-form

Opcode 0x100001CD

Extension VMX (AltiVec)

Operands

• vD
  Target
• vA
  Source
• RB
  Count (GPR)

Example

vclrrb vd, va, r5

Registers Altered

MSR

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Clears the rightmost N bytes of vector register vA (where N is derived from the low 4 bits of RB) and places the result in vD. Bits corresponding to the rightmost N bytes are set to zero while remaining bits are preserved. This is a VMX extension instruction with no condition register or status flag updates.

Operation

N ← RB[60:63]
if N > 16 then N ← 16
vD ← vA
for i in 0 to N-1 do
  vD[128-8*(i+1):128-8*i] ← 0

Programming Note

The vclrrb instruction is useful for clearing the rightmost bytes of a vector register based on a specified count. Ensure that the Vector Facility (MSR.VEC) is enabled to avoid a Vector_Unavailable exception. The value in GPR[RB] should be between 0 and 15; values greater than 15 will result in all bytes being cleared. This instruction operates on vector registers, so ensure proper alignment and privilege level as required by the system.