vaddubs

Vector Add Unsigned Byte Saturate

vaddubs vD, vA, vB

Adds the contents of two vector registers and saturates the result if it overflows.

Details

For vaddubs, each byte element in VSR[VRA+32] is added to the corresponding byte element in VSR[VRB+32]. If the sum exceeds 255, it saturates to 255 and sets the SAT field in VSCR.

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 15
    src1 ←EXTZ(VSR[VRA+32].byte[i])
    src2 ←EXTZ(VSR[VRB+32].byte[i])
    VSR[VRT+32].byte[i] ←ui8_CLAMP(src1 + src2)
end

Programming Note

vaddubs is commonly used for adding unsigned byte elements in vector registers with saturation to handle overflow. Ensure that the Vector Facility (MSR.VEC) is enabled; otherwise, a Vector_Unavailable exception will be raised. The operation processes 16 bytes per instruction, and results are clamped to 255 if they exceed this value, setting the SAT field in VSCR accordingly.

Example

vaddubs vd, va, vb

Encoding

Binary Layout
4
0
VRT
6
VRA
11
VRB
16
512
21
 
Format VX-form
Opcode 0x10000200
Extension VMX (AltiVec)
Registers Altered VSCR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Source Vector Register