vgbbd

Vector Gather Bits by Bytes by Doubleword

vgbbd vD, vB

The contents of bit j of each byte of doubleword element i of VSR[VRB+32] are concatenated and placed into byte j of doubleword element i of VSR[VRT+32].

Details

For vgbbd, the contents of bit j of each byte of doubleword element i of VSR[VRB+32] are concatenated and placed into byte j of doubleword element i of VSR[VRT+32]. An 8-bit × 8-bit bit-matrix transpose is performed on the contents of each doubleword element of VSR[VRB+32].

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 1
    do j = 0 to 7
        do k = 0 to 7
            b ← VSR[VRB+32].dword[i].byte[k].bit[j]
            VSR[VRT+32].dword[i].byte[j].bit[k] ← b
        end
    end
end

Programming Note

The vgbbd instruction performs a bit-matrix transpose on each doubleword element of the source vector, effectively rotating bits within bytes. Ensure that the Vector Facility is enabled by checking and setting the VEC bit in the MSR register. This operation requires aligned access to the vector registers. Be cautious with privilege levels; this instruction may require supervisor or hypervisor mode depending on system configuration.

Example

vgbbd vd, vb

Encoding

Binary Layout
0
0
6
6
11
11
16
16
21
21
31
31
 
Format VX-form
Opcode 0x10000502
Extension VMX (AltiVec)
Registers Altered MSR

Operands

  • vD
    Target
  • vB
    Source
  • VRT
    Target Vector Register
  • VRB
    Source Vector Register