mffscdrn

Move From FPSCR Control & Set DRN

mffscdrn FRT,FRB

Moves control bits from FPSCR to a register and sets the DRN field.

Details

The contents of the control bits in the FPSCR, that is, bits 29:31 (DRN) and bits 56:63 (VE, OE, UE, ZE, XE, NI, RN), are placed into the corresponding bits in register FRT. All other bits in register FRT are set to 0. The contents of bits 29:31 of the FPSCR (DRN) are set to the value of FRB.

Pseudocode Operation

FRT <- FPSCR[29:31] & FPSCR[56:63]
FPSCR[DRN] <- FRB[29:31]

Programming Note

mffscdrn permits software to simultaneously read control bits in the FPSCR and set the DRN field without the higher latency typically associated with accessing the status bits.

Example

mffscdrn f1, f3

Encoding

Binary Layout
0
0
FRT
6
FRB
11
583
21
 
Format X-form
Opcode 0xFC14048E
Extension Floating-Point
Registers Altered FPSCR

Operands

  • FRT
    Target Floating-Point Register
  • FRB
    Source Floating-Point Register