dcblc

Data Cache Block Lock Clear

dcblc CT, RA, RB

Clears a cache line lock.

Details

Clears the lock bit associated with the cache line at the address formed by adding RA and RB. The CT field specifies the cache target (L1, L2, etc.). This embedded instruction is typically used in multiprocessor environments to release a previously locked cache line. No condition flags are affected.

Pseudocode Operation

EA ← (RA) + (RB)
ClearCacheLock(CT, EA)

Example

dcblc 0, r4, r5

Encoding

Binary Layout
31
0
CT
6
RA
11
RB
16
390
21
/
31
 
Format X-form
Opcode 0x7C00030C
Extension Embedded

Operands

  • CT
    Cache Target
  • RA
    Base
  • RB
    Index