creqv
Condition Register Equivalent
Sets the condition register field to 1 if the corresponding fields of two source registers are equal, otherwise sets it to 0.
Details
Performs a bitwise equivalence operation on two condition register fields and places the result in the target condition register field (setting the target bit to 1 if both source bits are equal, 0 otherwise). This Base category instruction operates entirely within the condition register and does not affect other status fields. It is commonly used in conditional branch logic and CR field manipulation.
Pseudocode Operation
Programming Note
The creqv instruction is useful for comparing two condition register fields and determining where they are equivalent. It's important to ensure that the source registers (CRA and CRB) are correctly set before using this instruction, as incorrect values can lead to unexpected results in subsequent conditional logic. This instruction operates at the user privilege level and does not generate exceptions under normal circumstances.
Example
Encoding
Operands
-
CRb
Target Condition Register Field -
CRA
Source Condition Register Field -
CRB
Source Condition Register Field