creqv

Condition Register Equivalent

creqv CRb,CRA,CRB

Sets the condition register field to 1 if the corresponding fields of two source registers are equal, otherwise sets it to 0.

Details

The creqv instruction computes the logical equivalence (XNOR) of corresponding bits in two condition register fields, CRA and CRB, and places the result into the target condition register field CRb. For each bit position i from 0 to 7, if the bit from CRA equals the bit from CRB, the corresponding bit in CRb is set to 1; otherwise it is set to 0. This instruction is part of the XL-form instruction set and has been available since PowerISA P1.

Pseudocode Operation

for i = 0 to 7 do
    if CRA[i] == CRB[i] then
        CRb[i] <- 1
    else
        CRb[i] <- 0
    end if
end for

Programming Note

The creqv instruction is useful for comparing two condition register fields and determining where they are equivalent. It's important to ensure that the source registers (CRA and CRB) are correctly set before using this instruction, as incorrect values can lead to unexpected results in subsequent conditional logic. This instruction operates at the user privilege level and does not generate exceptions under normal circumstances.

Example

creqv 0, cr0, cr1

Encoding

Binary Layout
010011
0
CRb
6
CRA
11
CRB
16
01001
21
00001
31
Rc
 
Format XL-form
Opcode 0x4C000028
Extension Base
Registers Altered CR0, CR1-CR7

Operands

  • CRb
    Target Condition Register Field
  • CRA
    Source Condition Register Field
  • CRB
    Source Condition Register Field