bc

Branch Conditional

bc BO,BI,target_addr (AA=0 LK=0)

Branches conditionally based on the Count Register (CTR) and/or a bit in the Condition Register (CR).

Encoding

Binary Layout

target_addr

Format B-form

Opcode 0x40000000

Extension Base

Operands

BO
Branch Options (5 bits)
BI
CR Bit Index (5 bits)
BD
14-bit Signed Displacement
target_addr
Target address

Example

bc 12, 2, label

// Branch if CR bit 2 is set (beq).

Registers Altered

LR, CTR

Across architectures

Compare and Branch : how x86, ARM, RISC-V, and PowerISA each do this.

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Branches conditionally based on the state of the Count Register (CTR) and/or a bit in the Condition Register (CR), as controlled by the BO field. The AA field determines absolute vs. relative addressing; LK=1 saves the return address in LR. This is the fundamental conditional branch instruction.

Operation

ctr_ok ← (BO[2] = 1) | (CTR ≠ 0 ⊕ BO[3])
if BO[2] = 0 then CTR ← CTR - 1
cr_ok ← (BO[0] = 1) | (CR[BI] = BO[1])
if ctr_ok & cr_ok then
  if AA = 0 then NIA ← CIA + (BD || 0b00) else NIA ← (BD || 0b00)
if LK = 1 then LR ← CIA + 4

Extended Mnemonics

Extended Mnemonic	Equivalent Instruction

Programming Note

The bc instruction branches to a target address based on the condition bits in the Condition Register (CR). Ensure that the branch condition and target address are correctly set. The instruction operates at user privilege level, but care must be taken with conditional logic to avoid unintended execution paths.

bc