bcdctsq.

Binary Coded Decimal Compare and Test Sign Quadword

bcdctsq. vD, vB

Compares two binary coded decimal (BCD) numbers in a quadword format and tests the sign.

Details

The instruction converts the packed decimal value in VSR[VRB+32] to a signed integer and places it into VSR[VRT+32]. The sign code must be within the range 0xA to 0xF, with specific interpretations for positive and negative values. If the input is invalid, the result is undefined.

Pseudocode Operation

if MSR.VEC=0 then
    Vector_Unavailable()
inv_flag ←(VSR[VRB+32].nibble[31] < 0xA)
do i = 0 to 30
    inv_flag ←inv_flag | (VSR[VRB+32].nibble[i] > 0x9)
src_sign ←(VSR[VRB+32].nibble[31] = 0xB) | (VSR[VRB+32].nibble[31] = 0xD)
eq_flag ←(VSR[VRB+32].nibble[0:30] = 0)
lt_flag ←(eq_flag=0) & (src_sign=1)
gt_flag ←(eq_flag=0) & (src_sign=0)
result ←si128_CONVERT_FROM_BCD(VSR[VRB+32])
VSR[VRT+32] ←inv_flag ? undefined : result
CR.bit[56] ←inv_flag ? 0b0 : lt_flag
CR.bit[57] ←inv_flag ? 0b0 : gt_flag
CR.bit[58] ←inv_flag ? 0b0 : eq_flag
CR.bit[59] ←inv_flag

Programming Note

The bcdctsq. instruction is used to convert a packed decimal value to a signed integer, storing the result in VSR[VRT+32]. Ensure the input sign code is within 0xA to 0xF; otherwise, the result is undefined. The instruction sets condition register bits CR6 based on comparison results, but these are only valid if the input is not invalid.

Example

bcdctsq. vd, vb

Encoding

Binary Layout
4
0
VRT
6
0
11
VRB
16
1
21
/
22
385
23
 
Format VX-form
Opcode 0x100000C1
Extension Vector BCD
Registers Altered CR6

Operands

  • vD
    Target
  • vB
    Source
  • VRT
    Target Vector Register
  • VRB
    Source Vector Register
  • RT
    Target General Purpose Register
  • RA
    Source General Purpose Register
  • RB
    Source General Purpose Register