plh

Prefixed Load Halfword

plh RT, D(RA), R

Loads 16-bit halfword using 34-bit offset.

Details

The Prefixed Load Halfword instruction loads 16-bit halfword using 34-bit offset.

Pseudocode Operation

// Loads 16-bit halfword using 34-bit offset

Example

plh r3, 0(r4), 0

Encoding

Binary Layout
1
0
2
6
R
8
0
9
D0
14
40
32
RT
38
RA
43
D1
48
 
Format MLS:D-form
Opcode 0x06000000
Extension Prefixed

Operands

  • RT
    Target
  • D
    Offset
  • RA
    Base
  • R
    PC-Rel