xsaddqpo

VSX Scalar Add Quad-Precision Odd

xsaddqpo vD, vA, vB

Used for Quad-Precision arithmetic on hardware that splits quads.

Details

Adds the odd (high-order) portions of two 128-bit quad-precision floating-point values in VSRs vA and vB, placing the result in VSR vD. This instruction is used on systems that split quad-precision operands into even/odd register pairs. FPSCR exception flags are updated based on the operation result. Requires VSX support.

Pseudocode Operation

vD ← (vA + vB) as quad-precision (odd portion operation)
FPSCR[XX,ZX,OX,UX,VXISI] ← updated based on operation result

Programming Note

The xsaddqpo instruction is used for adding two quad-precision floating-point numbers using the round-to-odd rounding mode. Ensure that the input operands are correctly aligned and that the VSX registers are properly set up. This instruction operates at a privilege level that allows access to floating-point operations, and it may raise exceptions if invalid operations occur, such as signaling NaNs or infinities. Performance can be impacted by the precision of the operation and the current rounding mode settings in the FPSCR register.

Example

xsaddqpo vd, va, vb

Encoding

Binary Layout
63
0
vD
6
vA
11
vB
16
4
21
/
31
 
Format X-form
Opcode 0xFC000008
Extension VSX
Registers Altered FPSCR

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B