xvcmpgesp

VSX Vector Compare Greater or Equal Single-Precision

xvcmpgesp XT,XA,XB

Compares each element of two single-precision floating-point vectors and sets the target vector elements to all 1s if the corresponding source elements are greater than or equal, otherwise all 0s.

Encoding

Binary Layout

0:5

6:10

11:15

16:20

21:28

Format XX3-form

Opcode 0xF0000298

Extension VSX

Operands

XT
Target
XA
Src A
XB
Src B

Example

xvcmpgesp vs1, vs2, vs3

Registers Altered

CR6, FPSCR (FX VXSNAN VXVC)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For xvcmpgesp, each element of the single-precision floating-point vector in VSR[XA] is compared with the corresponding element in VSR[XB]. The result is stored in VSR[XT]. If Rc=1, CR field 6 is updated based on the comparison results.

Operation

if 'xvcmpgesp' then
    for each integer value i from 0 to 3 do
        src1 ← bfp_CONVERT_FROM_BFP32(VSR[32×AX+A].word[i])
        src2 ← bfp_CONVERT_FROM_BFP32(VSR[32×BX+B].word[i])
        if src1.class.SNaN | src2.class.SNaN then
            vxsnan_flag ← 0b1
            if FPSCR.VE=0 then vxvc_flag ← 0b1
        else vxvc_flag ← IsQNaN(src1) | IsQNaN(src2)
        if src1 >= src2 then
            vresult.word[i] ← 0xFFFF_FFFF
        else
            vresult.word[i] ← 0x0000_0000
        ex_flag ← ex_flag | (FPSCR.VE & vxsnan_flag) | (FPSCR.VE & vxvc_flag)
    end
    if ex_flag=0 then VSR[32×TX+T] ← vresult
    if Rc=1 then do
        CR.field[6] ← all_true || 0b0 || all_false || 0b0
    end

Programming Note

When Rc=1, CR1 is set from the FPSCR[FX, FEX, VX, OX] bits immediately after the operation completes.