xssubqp

VSX Scalar Subtract Quad-Precision

xssubqp VRT,VRA,VRB

Subtracts the contents of two quad-precision floating-point registers and handles special cases like NaNs.

Encoding

Binary Layout
63
0:5
FRT
6:10
FRA
11:15
FRB
16:20
514
21:30
Rc
31
 
Format X-form
Opcode 0xFC000408
Extension VSX

Operands

  • vD
    Target
  • vA
    Src A
  • vB
    Src B
  • VRT
    Target Vector-Scalar Register
  • VRA
    Source Vector-Scalar Register
  • VRB
    Source Vector-Scalar Register

Example

xssubqp v1, v2, v3

Registers Altered

FPSCR FPRF FR FI FX VXSNAN VXISI OX UX XX

Related

More in VSX

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Subtracts the quad-precision floating-point operand in VSR VRB from VSR VRA and stores the result in VSR VRT, handling infinities, NaNs, and denormalised numbers according to IEEE 754 semantics. This VSX instruction may update FPSCR exception flags and the result sign. The 'o' suffix variant enables underflow/overflow exception.

Operation

FRT ← FRA - FRB
FPSCR ← updated with exception flags (XX, ZX, UX, OX, VXISI, VXSNAN, etc.)

Programming Note

The xssubqp instruction is used for subtracting quad-precision floating-point numbers. Ensure that the VSX feature is enabled in the MSR register to avoid exceptions. Handle special cases like NaNs and infinities by checking the FPSCR flags after execution. The result is rounded according to the rounding mode specified in FPSCR.RN.