maclhwu

Multiply Accumulate Low Halfword Unsigned

maclhwu RT, RA, RB

Unsigned Multiply Accumulate Low Halfword.

Encoding

Binary Layout

4

0:5

RT

6:10

RA

11:15

RB

16:20

396

21:30

0

31

 

Format XO-form

Opcode 0x10000318

Extension Embedded

Operands

• RT
  Acc/Dest
• RA
  Src A
• RB
  Src B

Example

maclhwu r3, r4, r5

Related

More in Embedded

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

Multiplies the low halfword (bits 16-31) of RA by the low halfword of RB as unsigned integers, then adds the 32-bit product to RT and stores the result in RT. This is part of the Embedded (SPE) category and does not affect any condition or status registers.

Operation

product ← EXTZ(RA[16:31]) × EXTZ(RB[16:31])
RT ← RT + product