mfsr

Move From Segment Register

mfsr RT, SR

Legacy 32-bit segment register read.

Details

Reads a 32-bit Segment Register (legacy 32-bit PowerPC mode) and stores the value in RT. This instruction is used only in 32-bit addressing mode and is deprecated in 64-bit architecture. No condition or status registers are modified.

Pseudocode Operation

RT ← SR[SR number from instruction]

Example

mfsr r3, 0

Encoding

Binary Layout
31
0
RT
6
SR
11
/
16
595
21
/
31
 
Format X-form
Opcode 0x7C0004A6
Extension Base

Operands

  • RT
    Target
  • SR
    Segment Reg