vsrb

Vector Shift Right Byte

vsrb vD, vA, vB

Shifts each byte element of the source vector right by a specified number of bits.

Encoding

Binary Layout

0:5

VRT

6:10

VRA

11:15

VRB

16:20

516

21:31

Format VX-form

Opcode 0x10000204

Extension VMX (AltiVec)

Operands

vD
Target
vA
Data
vB
Shift
VRT
Target Vector Register
VRA
Source Vector Register
VRB
Shift Control Vector Register

Example

vsrb vd, va, vb

Registers Altered

MSR

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For vsrb, each byte element of VSR[VRA+32] is shifted right by the number of bits specified in the low-order 3 bits of the corresponding byte element in VSR[VRB+32].

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 15
    src1 ← VSR[VRA+32].byte[i]
    src2 ← VSR[VRB+32].byte[i].bit[5:7]
    VSR[VRT+32].byte[i] ← CHOP8(EXTZ(src1) >> src2)
end

Programming Note

The vsrb instruction shifts each byte of the source vector right by a specified number of bits, determined by the lower 3 bits of the corresponding byte in another vector. Ensure that the Vector Facility is enabled (MSR.VEC=1); otherwise, a Vector_Unavailable exception will be raised. This operation is useful for bit manipulation tasks but requires careful handling of alignment and privilege levels to avoid exceptions.