vslb

Vector Shift Left Byte

vslb vD, vA, vB

Shifts each byte element of the source vector left by a specified number of bits.

Encoding

Binary Layout
4
0:5
vD
6:10
vA
11:15
vB
16:20
260
21:31
 
Format VX-form
Opcode 0x10000104
Extension VMX (AltiVec)

Operands

  • vD
    Target
  • vA
    Data
  • vB
    Shift
  • VRT
    Target Vector Register
  • VRA
    Source Vector Register
  • VRB
    Shift Control Vector Register

Example

vslb vd, va, vb

Registers Altered

MSR

Related

More in VMX (AltiVec)

Reference

View in PowerISA v3.1C Specification ↗ OPF Power ISA v3.1C

Description

For vslb, each byte element of VSR[VRA+32] is shifted left by the number of bits specified in the low-order 3 bits of the corresponding byte element of VSR[VRB+32].

Operation

if MSR.VEC=0 then
    Vector_Unavailable()
do i = 0 to 15
    src1 ← VSR[VRA+32].byte[i]
    src2 ← VSR[VRB+32].byte[i].bit[5:7]
    VSR[VRT+32].byte[i] ← src1 << src2

Programming Note

The vslb instruction shifts each byte of the source vector left by a specified number of bits, determined by the lower 3 bits of the corresponding byte in the second source vector. Ensure that the Vector Facility is enabled (MSR.VEC=1) to avoid a Vector_Unavailable exception. This operation is useful for bit manipulation tasks but requires careful handling of alignment and privilege levels.